The present invention relates to three-phase signal decoder devices and methods, and in particular to devices and methods for decoding a three-phase analog heading signal in an electronic navigation system.
In modern electronic navigation systems, host-ship heading information and bearing information relative to a radio navigation aid is typically conveyed through an analog synchronic repeater device and converted into a digital signal for use by the navigation system. In typical avionics navigation systems, a synchronic heading and Omni-Bearing Selector (OBS) module takes the synchronic heading and OBS resolver analog inputs and converts them to digital values for use by the main processor. Accurate conversion of the information is very important for safe navigation of the aircraft.
The OBS resolver outputs analog sine and cosine values directly.
As illustrated in FIG. 1, the heading synchronic device 1 is a 3-wire device driven by a 400 Hz excitation signal. The heading synchronic device 1 generates a 3-phase signal through three equally spaced stator windings 2, 3, 4 in the synchro body. The phase difference between any of two signals is a fixed value, typically 120 degrees. The heading and OBS module uses this information to generate two heading signals corresponding to the sine and cosine of the relative position of a rotor 5. Conditioning of the 3-phase signal requires resolving the cosine and sine angles between the analog inputs.
Traditionally, the heading synchronic signal xcex8 is partially resolved using the Scott-T transformer 7. FIG. 2 illustrates a synchronic heading and OBS module 6 in which conditioning of the 3-phase signal is accomplished using a Scott-T transformer 7. Each leg of the Scott-T transformer 7 takes two input voltages and outputs an analog voltage used to calculate the angle, which in turn corresponds to an instrument heading or bearing angle. Accordingly, measuring across the S1, S2 terminals of the heading synchronic device 1 generates a first voltage:
V1=sin(xcfx89t)*sin(xcex8).xe2x80x83xe2x80x83(Eq. 1)
The Scott-T transformer 7 takes as inputs the S2, S3 terminals of the heading synchronic device 1 generates a second voltage:
V2=sin(xcfx89t)*sin(xcex8+120),xe2x80x83xe2x80x83(Eq. 2)
where: xcfx89t is the 400 Hz excitation signal. Using these two values, the Scott-T transformer 7 generates cos(xcex8) in hardware.
The processor 8 must compute the arctangent of the angle derived from these two input voltage signals to generate the heading synchro angle xcex8, according to the following:                     θ        =                                            tan                              -                1                                      ⁡                          (                                                V                  1                                *                                                      sin                    ⁡                                          (                      120                      )                                                                            (                                                                  V                        2                                            -                                                                        V                          1                                                *                                                  cos                          ⁡                                                      (                            120                            )                                                                                                                )                                                              )                                .                                    (                  Eq          .                      xe2x80x83                    ⁢          3                )            
Because sin(120) and cos(120) are constants, Eq. 1 reduces to:                     θ        =                                            tan                              -                1                                      ⁡                          (                                                                    √                    3                                    2                                *                                                      V                    1                                                        (                                                                  V                        2                                            +                                              0.5                        ⁢                                                  V                          1                                                                                      )                                                              )                                .                                    (                  Eq          .                      xe2x80x83                    ⁢          4                )            
The Scott-T transformer 7 thus mechanizes a portion of the arctangent function in hardware, but the processor 8 must take as input the value of V1 and the value output by the Scott-T transformer 7 through separate analog-to-digital (A/D) converters 9, 10, and operate the arctangent Eq. 4 to generate the synchro angle xcex8 from the derived signals.
Scott-T transformer is a complicated and expensive device. Furthermore, although effective for generating the signals used to generate the synchro angle xcex8, the processor 8 must still be used to generate the heading synchro angle xcex8.
The present invention provides an accurate and economic apparatus and method for determining heading synchronic and OBS resolver values by operating a computer processor that is structured to receive an output of A/D conversion circuitry and a digital reference waveform input, the computer processor being structured to operate an algorithm for converting the output of the A/D conversion circuitry to a heading angle.
According to one embodiment of the invention, a device is provided for converting 3-phase analog signals to digital angles, the device having a first and a second differential amplifier, the first differential amplifier being coupled to receive and compare a first and a second of the 3-phase analog signals, and the second differential amplifier being coupled to receive the second and a third of the 3-phase analog signals; analog-to-digital (A/D) conversion circuitry coupled to receive an output of the first and second differential amplifiers; and the computer processor structured to receive an output of the A/D conversion circuitry and a digital reference waveform input, the computer processor being structured to operate an algorithm for converting the output of the A/D conversion circuitry to an angle.
According to one embodiment of the invention, the device further includes an Omni-Bearing Selector (OBS) portion that is structured to receive analog sine and cosine inputs of an OBS resolver and is coupled to the processor for converting bearing information relative to a radio navigation aid, the processor having installed thereon an algorithms for converting the OBS sine and cosine inputs to a bearing angle. The OBS portion further includes first and second differential amplifiers coupled to amplify sine and cosine output signals, and a drive signal that is one of a drive signal generated by the processor and a drive signal generated by the digital reference waveform.
According to one embodiment of the invention, the invention provides a heading and Omni-Bearing Selector (OBS) module for converting 3-phase analog heading signals input from a heading synchronic device and analog sine and cosine bearing signals input from an OBS resolver device, the heading and OBS module having (a) a processor; (b) a heading signal converting portion formed of: i) first and second differential amplifiers structured to compare first and second input analog signals, the first input differential amplifier being structured to receive first and second analog output voltage signals from a 3-phase heading synchronic device, and the second input differential amplifier being structured to receive second and third analog output voltage signals from the 3-phase heading synchronic device, ii) a first analog-to-digital (A/D) converter coupled between the first differential amplifier and the processor to receive an output of the first differential amplifier and input the output to the processor, iii) a second analog-to-digital (A/D) converter coupled between the second differential amplifier and the processor to receive an output of the second differential amplifier and input the output to the processor, and iv) software resident on the processor for converting the outputs of the first and second differential amplifiers to an angle representative of heading; and (c) an OBS signal converting portion for converting analog sine and cosine signals from an OBS resolver device, the OBS signal converting portion formed of: i) an OBS drive signal, ii) first and second differential amplifiers coupled to receive respective analog sine and cosine signals from an OBS resolver device and output respective amplified analog sine and cosine signals, iii) first and second analog-to-digital (A/D) converters coupled to receive the output of the respective first and second differential amplifiers, and iv) software resident on the processor for converting the outputs of the first and second differential amplifiers to an angle representative of bearing.
According to one aspect of the invention, the processor of the heading and OBS module includes the first and second analog-to-digital (A/D) converters.
According to another aspect of the invention, the processor is further structured to operate under the control of a digital reference waveform input signal.
According to another aspect of the invention, the OBS drive signal is one of a drive signal generated by the processor and a drive signal generated by the digital reference waveform.
According to still another aspect of the invention, the processor is a Microchip PIC16C77X series-type processor, for example but not limited to the Microchip PIC16C773 processor, or another processor that is equivalent thereto.
According to still other aspects of the invention, the invention provides methods for converting 3-phase analog heading signals input from a heading synchronic device to a signal representing the heading angle and methods for converting input analog sine and cosine bearing angle signals from an Omni-Bearing Selector device to a signal representing the bearing angle.